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Semiconductor wafer defect inspection

Analyze each wafer layer for defects and other unwanted anomalies

Deep learning distinguished between a good semiconductor wafer inspection and two bad inspection examples.

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In-Sight D900

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Semiconductor wafers consist of multiple layers. For each layer, a complex and precise process of material deposition, resist application, lithography, etching, and ion implantation is performed, after which the resist is removed.

Before yet another layer is applied, the newly etched and implanted layer must be inspected for defects. Wafer layers can show scratches, spin defects, exposure problems, particle contamination, hot spots, wafer edge flaws, and a wide range of other defects that affect eventual chip performance.

If not detected immediately after layer deposition, such defects may be detected only at final testing, causing yield losses. Even if they pass final electrical testing, undetected flaws can reduce reliability in use, leading to premature failure.

The range of possible defects is large, and they can be located anywhere on the circular wafer. Any defects must be detected against the confusing background of previously deposited layers. Conventional machine vision can’t be programmed to detect such a wide range of errors and is unreliable at detecting even programmed defects against the complex background.

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Cognex Deep Learning is a great solution for this type of complex defect detection inspection problem. The defect detection tool learns the appearance of a defect-free wafer layer from a small set of images of functional wafer layers. The tool can then detect even small defects anywhere in the wafer layer, completely ignoring underlying layers, and rejects any anomalies.


The In-Sight D900 uses deep learning to inspect semiconductor wafers for defects and other unwanted cosmetic anomalies.


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